Programmable integrated circuits (ICs) are a well-known type of IC that can be programmed to perform specified logic functions. One type of programmable IC, the field programmable gate array (FPGA), typically includes an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
Each programmable tile typically includes both programmable interconnect circuitry and programmable logic circuitry. The programmable interconnect circuitry typically includes a large number of interconnect lines of varying lengths interconnected by programmable interconnect points (PIPs). The programmable logic circuitry implements the logic of a user design using programmable elements that can include, for example, function generators, registers, arithmetic logic, and so forth.
The programmable interconnect circuitry and programmable logic circuitry are typically programmed by loading a stream of configuration data into internal configuration memory cells that define how the programmable elements are configured. The configuration data can be read from memory (e.g., from an external PROM) or written into the FPGA by an external device. The collective states of the individual memory cells then determine the function of the FPGA.
Another type of programmable IC is the complex programmable logic device, or CPLD. A CPLD includes two or more “function blocks” connected together and to input/output (I/O) resources by an interconnect switch matrix. Each function block of the CPLD includes a two-level AND/OR structure similar to those used in programmable logic arrays (PLAs) and programmable array logic (PAL) devices. In CPLDs, configuration data is typically stored on-chip in non-volatile memory. In some CPLDs, configuration data is stored on-chip in non-volatile memory, then downloaded to volatile memory as part of an initial configuration (programming) sequence.
For all of these programmable ICs, the functionality of the device is controlled by data bits provided to the device for that purpose. The data bits can be stored in volatile memory (e.g., static memory cells, as in FPGAs and some CPLDs), in non-volatile memory (e.g., FLASH memory, as in some CPLDs), or in any other type of memory cell.
Other programmable ICs are programmed by applying a processing layer, such as a metal layer, that programmably interconnects the various elements on the device. These programmable ICs are known as mask programmable devices. Programmable ICs can also be implemented in other ways, e.g., using fuse or antifuse technology. The phrase “programmable IC” can include, but is not limited to these devices and further can encompass devices that are only partially programmable. For example, one type of programmable IC includes a combination of hard-coded transistor logic and a programmable switch fabric that programmably interconnects the hard-coded transistor logic.
Programmable ICs are often incorporated into larger systems that can include a non-volatile I/O device (I/O device). Examples of I/O devices can include various flash memory devices including, but not limited to, serial peripheral interface (SPI) flash, queued serial peripheral interface (QSPI) flash, serial advanced technology attachment (SATA) flash, NAND flash, and the like. A data operation, such as a read or a write, within an I/O device is typically performed upon a data block that can store multiple words, bytes, or bits at a particular address within the I/O device. Access times for I/O devices are generally slower than the clock rate of most modern processors and programmable ICs.
Typically, data stored within an I/O device, e.g., configuration data, is loaded into a programmable IC at initialization of a system. The slower access time of the I/O device can create a data bottleneck that impedes the loading of data from the I/O device into the programmable IC. This data bottleneck lengthens the initialization time of the programmable IC. In many applications, the initialization of a system must occur within a limited time frame. As programmable ICs increase in size and complexity, a proportional increase can occur in the quantity of configuration data required to configure the programmable IC. This increase in configuration data can exacerbate the impact of the I/O device induced data bottleneck on the initialization of the programmable IC. As a result, the initialization of the programmable IC, and thus, any system in which the programmable IC is located, may require more time than is desired or permitted.